DDR Signal Integrity Platform Applications Engineer (PAE)

Job Description The Intel Network and Edge (NEX) group is seeking a DDR5/LPDDR5 Signal Integrity Engineer.
The candidate will perform modeling and simulation of high-speed DDR5/LPDDR5 interfaces, interconnects and channels.
and work with silicon designers, platform designers, package designers, electrical validation teams, etc.
to support interconnect and interface performance requirements.
The candidate will contribute to package and platform design guideline development as well as review and evaluate package and board designs.
Provides technical and issue resolution support during development, testing, and production.
Creates product specifications, hardware design guides, application notes, and other supporting technical collateral.
Collaborates and enables internal and external silicon, hardware, SI KIT and software teams to deliver latest products in the market.
Partners with customer product design and manufacturing teams to ensure smooth product ramp through integrating customer DFx requirements, mitigating customer factory challenges, delivering product training, and providing health oversight with rapid technical support and systematic improvement action.
Qualifications Additional Scope: � Validate the simulation results Assess timing, noise margin, crosstalk, signal loss and signal integrity of all clocks and critical data signaling and develop noise and timing budgets � Working in lab to perform measurement, and correlating measurements to simulations.
� Collaboration with IP teams developing IBIS-AMI models � Parameter extraction from ODB++ files to create package models � Communicate customer PCB Design methodologies and requirements to IP Teams � Post layout SI support: Review package, customer board and reference platform designs/perform SI analysis as needed � Review of customer schematics and layout � Working in lab to perform measurement, and correlating measurements to simulations.
� Testing of models in EDA simulation tools such as: HSPICE, ADS, HyperLynx, Cadence Topology Explorer, and Signal Integrity Toolbox] � Perform model quality checks and correlation through time and frequency domain simulations.
� Customer support and development of model documentation and user guides � Stay up to date on the latest advancements in signal and power integrity technology.
Minimum Qualifications � BSEE /MSEE relevant actual product design and validation experience.
10+ years of experience in signal integrity � Knowledge of JEDEC standards � Knowledge on interface such as DDR (e.
g.
DDR4 LPDDR4/4x, DDR5 LPDDR5/5x ) � Possess strong fundamentals in 3D/2D EM simulation tools/field solver and transmission line theory.
� Understanding of IBIS standard, IBIS and IBIS-AMI model syntax, usage, and limitations � Strong hands-on skills in data analysis, debugging and lab measurement.
� Hands on Signal Integrity design, Simulations, System modelling, I/O modelling � Ability to effectively communicate ideas and results.
� Excellent verbal communication and/or technical writing skills in English � Ability to work independently as well as collaborate in a team environment.
Preferred Qualifications � Experience with platform/board design SI analysis, frequency and time domain analysis, SI/PI methodology development, and lab correlation/validation of the simulation results � Understanding of I/O circuit design, equalization techniques, signal integrity principles, and printed circuit board (PCB) layout techniques.
� Power Integrity Simulations and analysis, System modelling, I/O modelling, and measurement � Scripting languages such as Matlab, Python, etc.
� Familiarity with lab equipment, such as: scopes, VNA, TDR, real-time scope, spectrum analyzer, etc.
� Correlating simulations with system measurements � Strong hands-on skills in data analysis, debugging and lab measurement.
� Able to follow a logical and methodical approach to solve customer reported issues � Good interpersonal and presentation skills in English Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Inside this Business Group The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership.
It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.
Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry.
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.
Find more information about all of our Amazing Benefits here.
It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews.
We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives.
Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money.
We would urge people interested in working for Intel, to apply directly at https://jobs.
intel.
com/ and not fall prey to unscrupulous elements.
Working Model This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need.
This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances the work model may change to accommodate business needs.
JobType Fully Remote